Silicon Engineering Digest

Intel GaN Chiplet Breakthroughs

• 🔥 World's Thinnest GaN Chiplet: Intel Foundry unveiled a 19-micrometer thick GaN-on-silicon chiplet from 300mm...

Key engineering highlights from the Rebellions-SKT-Arm collab:

• Arm AGI CPU (Neoverse CSS V3) pairs with RebelCard (4 NPU chiplets + HBM3E) for...

Key drivers for AMAT's DRAM leadership amid AI HBM boom:

• DRAM at 34% of revenues, fastest-growing in 2025 from equipment intensity
• 4F2 to 6F2...

Key advances in hybrid tech for chiplet/HBM stacking:

• HANMI's 2nd-gen hybrid bonder prototype launches end-2026, enabling thinner packages and...

Intel Foundry's breakthrough world's thinnest 19μm GaN-on-Si chiplet integrates GaN transistors with silicon digital circuits monolithically on 300mm...

Intel bets advanced chip packaging will fuel its comeback, holding talks with Google and Amazon to win AI silicon business from TSMC. A pivotal engineering play in the AI race.

Advanced Packaging Bottlenecks

• 🔥 Nvidia Secures Dominant CoWoS Share: Nvidia has secured a dominant share of the world’s most advanced chip...

Key milestone at Albany NanoTech: Installation begins on Tokyo Electron system for North America's first public High-NA EUV research hub, processing...

On-chip data movement emerges as the key bottleneck in compute-dense edge AI architectures.

NXP expands Arteris tools for scalable solutions:
-...

Major leap in pre-silicon verification: Siemens' Veloce proFPGA CS + NVIDIA architecture captures tens of trillions of cycles in days for complex...

TSMC CoWoS capacity structurally oversubscribed for AI chips, limiting high-power designs.

• Intel's EMIB-T (with TSVs for HBM4 power/scaling) rolls...

Advanced Packaging Developments

• 🔥 Apple Tests Glass Substrates: Apple has begun testing advanced glass substrates for AI server chips codenamed...

Global HBM advances intensify AI/HPC readiness amid competitive shifts:

• Synopsys' first HBM4 IP test chip validates full interface at 9.2 Gbps with...

Engineering milestone: World's thinnest 19μm GaN chiplet from 300mm GaN-on-Si wafers, ~1/5th human hair width.

• Integrated design: GaN transistors +...

Intel Foundry's packaging tech emerges as AI differentiator, with talks underway with Google and Amazon for custom silicon services.

• EMIB (silicon...

Silicon photonics heats up for AI bandwidth:

• TSMC's COUPE platform uses SoIC-X stacking for 5–10x power efficiency and enters volume production in...

VSORA rethinks silicon data movement, ensuring arithmetic units get a steady data stream every cycle for superior utilization.

• Jotunn8 targets...

Geopolitical escalation in semiconductors: US MATCH Act requires allies to curb DUV lithography and cryogenic etching exports to China within 150...

Apple's push into glass substrates unlocks higher-density AI packaging:

• Testing advanced glass for Baltra AI server chips on TSMC 3nm N3E with...

Advanced Packaging Investments

• 🔥 Tokyo Electron's R&D Push: Tokyo Electron announced plans to invest ¥1.5 trillion over five years in R&D...